A single crystal used as a substrate of semiconductor devices is, for example, a silicon single-crystal. It is mainly produced by Czochralski Method (referred to as CZ method for short hereafter). In recent years, semiconductor devices have come to be integrated higher and devices have come to be decreased in size. Along with that, a problem of Grown-in defects introduced during growth of a single crystal has become more important.
Hereafter, Grown-in defects will be explained with reference to FIG. 7.
Generally, in the case of growing a silicon single crystal, when a growth rate V of the crystal (a pulling rate of the crystal) is relatively high, there exist Grown-in defects such as FPD (Flow Pattern Defect) and COP (Crystal Originated Particle), which are considered due to voids consisting of agglomerated vacancy-type point defects, at a high density over the entire radial direction of the crystal. The region containing these defects due to voids is referred to as V (Vacancy) region.
Furthermore, when the growth rate of the crystal is lowered, along with lowering of the growth rate, an OSF (Oxidation Induced Stacking Fault) region is generated from the periphery of the crystal in a ring shape. When the growth rate is further lowered, the OSF ring shrinks to the center of the wafer and disappears. When the growth rate is further lowered, there exist defects such as LSEPD (Large Secco Etch Pit Defect) and LFPD (Large Flow Pattern Defect), which are considered due to dislocation loops consisting of agglomerated interstitial silicon atoms, at a low density. The region where these defects exist is referred to as I (Interstitial) region.
In recent years, a region containing no defects like FPD and COP due to voids as well as no defects like LSEPD and LFPD due to interstitial silicon atoms has been found between the V region and the I region and also outside the OSF ring. This region is referred to as N (Neutral) region. In addition, it has been found that when further classifying the N region, there exist Nv region (the region where a lot of vacancies exist) adjacent to the outside of the OSF ring and Ni region (the region where a lot of interstitial silicon atoms exist) adjacent to the I region, and that when performing thermal oxidation treatment, a lot of oxide precipitates are generated in the Nv region and little oxide precipitates are generated in the Ni region.
Furthermore, it has been found that, after performing the thermal oxidation treatment, there exist a region where defects detected by Cu deposition treatment are particularly generated (hereinafter referred to as Cu deposition defect region) in a portion of the Nv region where oxygen precipitation tends to be generated, and the Cu deposition defect region causes degradation of electric property like oxide dielectric breakdown voltage characteristics.
It is considered that introduction amount of these Grown-in defects is determined by a parameter of V/G (mm2/° C.·min) which is a ratio of a pulling rate V (mm/min) when a single crystal is grown and a temperature gradient G (° C./mm) of the crystal in the direction of pulling axis from melting point of silicon to 1400° C. at the vicinity of solid-liquid interface (for example, see V. V. Voronkov, Journal of Crystal Growth, 59 (1982), 625-643). Therefore, a single crystal is grown with controlling V/G to be a determined value constantly, and thus a single crystal including a desired defect region or a desired defect-free region can be produced.
For example, in Japanese Patent Laid-open (Kokai) No. H11-147786, it is disclosed that, when a silicon single crystal is grown, the single crystal is pulled with controlling V/G in a determined range (for example, 0.112-0.142 mm2/° C.·min) at the center of the crystal, and thus a silicon single crystal wafer without defects due to voids and defects due to dislocation loops can be obtained. Furthermore, in recent years, the demand for a defect-free crystal of N region without Cu deposition defect region has become higher. And it has been demanded a production of a single crystal in which the single crystal is pulled with controlling V/G to be a desired defect-free region with high precision.
Generally, temperature gradient G of a crystal in a direction of a pulling axis is considered to be determined only by HZ (hot zone: a furnace structure) of an apparatus for pulling a single crystal in which the single crystal is grown. However, it is extremely difficult to change HZ while pulling a single crystal. Therefore, when a single crystal is grown with controlling V/G as described above, the temperature gradient G of the crystal isn't controlled during pulling the single crystal. However, V/G is controlled by adjusting the pulling rate V and a single crystal including a desired defect region is produced.
In addition, it has been known that the temperature gradient G of the crystal generally tends to lower as a single crystal grows, and thus the temperature gradient G of the crystal becomes smaller at the end of growing the straight body of the single crystal than at the start of growing the straight body of the single crystal. Therefore, in order to control V/G to be a desired value almost constantly, as the single crystal grows, a pulling rate V has to be changed to be a lower rate according to fluctuation (decline) of the temperature gradient G of the crystal. As a result, time for growing a straight body of a single crystal lengthens, and thus there is a problem that productivity is lowered.
Furthermore, the pulling rate at the end of growing a straight body of a single crystal influences a pulling rate and pulling time of the single crystal at the subsequent tailing process to form a tail of the single crystal. Therefore, if the pulling rate is lowered at the end of growing a straight body of a single crystal as described above, the pulling rate at the tailing process is also lowered and pulling time is further drawn out. Accordingly, there is a problem that productivity in producing a single crystal is extremely lowered and it leads to raise of production cost.